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--- die_erste_schaltung [2010/09/19 22:14]
beckmanf created
+++ die_erste_schaltung [2014/03/27 14:14] (current)
beckmanf Swapped Schaltung / Testbench
@@ Line 3: / Line 3: @@
 besteht aus zwei VHDL Dateien, der eigentlichen Schaltung und
 einer Testbench, mit der die Schaltung simuliert werden kann.
+== Die Schaltung ==
+<code vhdl first.vhd>
+library ieee;
+use ieee.std_logic_1164.all;
+-- Simple module that connects the SW switches to the LEDR lights
+entity first is
+port ( SW   : in      std_ulogic_vector(9 downto 0);
+       LEDR : out     std_ulogic_vector(9 downto 0));  -- red LEDs
+end first;
+architecture structure of first is
+begin
+  LEDR <= SW;
+end structure;
+</code>
 == Die Testbench ==
@@ Line 21: / Line 40: @@
   component first
   port (
-    SW:         in std_logic_vector(9 downto 0);
+    SW:         in std_ulogic_vector(9 downto 0);
-    LEDR:       out std_logic_vector(9 downto 0)
+    LEDR:       out std_ulogic_vector(9 downto 0)
     );
   end component;
 -- Signal declaration for the switches and the leds
-  signal switch, ledr : std_logic_vector(9 downto 0) := "0000000000";
+  signal switch, ledr : std_ulogic_vector(9 downto 0);
 begin
@@ Line 52: / Line 71: @@
 </code>
-== Die Schaltung ==
-<code vhdl first.vhd>
-LIBRARY ieee;
-USE ieee.std_logic_1164.all;
--- Simple module that connects the SW switches to the LEDR lights
-ENTITY first IS
-PORT ( SW   : IN      STD_LOGIC_VECTOR(9 DOWNTO 0);
-       LEDR : OUT     STD_LOGIC_VECTOR(9 DOWNTO 0));  -- red LEDs
-END first;
-ARCHITECTURE Structure OF first IS
-BEGIN
-  LEDR <= SW;
-END Structure;
-</code>